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| September 2001 FDG6303N Dual N-Channel, Digital FET General Description These dual N-Channel logic level enhancement mode field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance. This device has been designed especially for low voltage applications as a replacement for bipolar digital transistors and small signal MOSFETs. Features 25 V, 0.50 A continuous, 1.5 A peak. RDS(ON) = 0.45 @ VGS= 4.5 V, RDS(ON) =0.60 @ VGS= 2.7 V. Very low level gate drive requirements allowing direct operation in 3 V circuits (VGS(th) < 1.5 V). Gate-Source Zener for ESD ruggedness (>6kV Human Body Model). Compact industry standard SC70-6 surface mount package. SC70-6 SOT-23 SuperSOTTM -6 SuperSOTTM -8 SO-8 SOT-223 D1 G2 S2 1 or 4 * 6 or 3 .03 2 or 5 5 or 2 SC70-6 S1 G1 D2 3 or 6 4 or 1 * * The pinouts are symmetrical; pin 1 and 4 are interchangeable. Units inside the carrier can be of either orientation and will not affect the functionality of the device. Absolute Maximum Ratings Symbol Parameter TA = 25C unless otherwise noted FDG6303N Units VDSS VGSS ID PD TJ,TSTG ESD Drain-Source Voltage Gate-Source Voltage Drain/Output Current - Continuous - Pulsed Maximum Power Dissipation (Note 1) 25 - 0.5 to +8 V V A 0.5 1.5 0.3 -55 to 150 6.0 W C kV Operating and Storage Temperature Range Electrostatic Discharge Rating MIL-STD-883D Human Body Model (100 pF / 1500 ) Thermal Resistance, Junction-to-Ambient THERMAL CHARACTERISTICS RJA 415 C/W FDG6303N Rev.F Electrical Characteristics (TA = 25 OC unless otherwise noted ) Symbol Parameter Conditions Min Typ Max Units OFF CHARACTERISTICS BVDSS Drain-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Zero Gate Voltage Drain Current VGS = 0 V, ID = 250 A ID = 250 A, Referenced to 25oC VDS = 20 V, VGS = 0 V TJ = 55C VGS = 8 V, VDS = 0 V VDS = VGS, ID = 250 A ID = 250 A, Referenced to 25oC VGS = 4.5 V, ID = 0.5 A TJ =125C VGS = 2.7 V, ID = 0.2 A 25 26 1 10 100 V mV/oC A A nA BVDSS/TJ IDSS IGSS VGS(th) Gate - Body Leakage Current ON CHARACTERISTICS (Note 2) Gate Threshold Voltage Gate Threshold Voltage Temp.Coefficient Static Drain-Source On-Resistance 0.65 0.8 -2.6 0.34 0.55 0.44 1.5 V mV/oC VGS(th)/TJ RDS(ON) 0.45 0.77 0.6 ID(ON) gFS Ciss Coss Crss tD(on) tr tD(off) tf Qg Qgs Qgd IS VSD On-State Drain Current Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Turn - On Delay Time Turn - On Rise Time Turn - Off Delay Time Turn - Off Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge Maximum Continuous Source Current Drain-Source Diode Forward Voltage VGS = 2.7 V, VDS = 5 V VDS = 5 V, ID = 0.5 A VDS = 10 V, VGS = 0 V, f = 1.0 MHz 0.5 1.45 50 28 9 A S pF pF pF 6 18 30 25 2.3 ns ns ns ns nC nC nC 0.25 A V DYNAMIC CHARACTERISTICS SWITCHING CHARACTERISTICS (Note 2) VDD = 5 V, ID = 0.5 A, VGS = 4.5 V, RGEN = 50 3 8.5 17 13 VDS = 5 V, ID = 0.5 A, VGS = 4.5 V 1.64 0.38 0.45 DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS VGS = 0 V, IS = 0.25 A (Note 2) 0.8 1.2 Notes: 1. RJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RJC is guaranteed by design while RCA is determined by the user's board design. RJA = 415OC/W on minimum pad mounting on FR-4 board in still air. 2. Pulse Test: Pulse Width < 300s, Duty Cycle < 2.0%. FDG6303N Rev.F Typical Electrical Characteristics 1.5 I D , DRAIN-SOURCE CURRENT (A) 1.2 , NORMALIZED 3.0V 2.7V DRAIN-SOURCE ON-RESISTANCE VGS = 4.5V 2 2.5V 2.0V VGS = 2.0V 1.5 0.9 2.5V 2.7V 1 3.0V 3.5V 4.5V 0.6 0.3 R D(N O S) 1.5V 0 0 0.5 1 1.5 2 2.5 3 VDS , DRAIN-SOURCE VOLTAGE (V) 0.5 0 0.2 0.4 0.6 0.8 1 1.2 ID , DRAIN CURRENT (A) Figure 1. On-Region Characteristics. Figure 2. On-Resistance Variation with Drain Current and Gate Voltage. 1.6 DRAIN-SOURCE ON-RESISTANCE R DS(ON) , NORMALIZED 2 I D = 0.5A 1.4 R DS(on), ON-RESISTANCE (OHM) ID = 0.3A 1.6 VGS = 4.5 V 1.2 1.2 1 0.8 TA = 125C 0.8 0.4 TA = 25C 0 1 1.5 2 2.5 3 3.5 4 4.5 5 0.6 -50 -25 0 25 50 75 100 125 150 TJ , JUNCTION TEMPERATURE (C) V GS , GATE TO SOURCE VOLTAGE (V) Figure 3. On-Resistance Variation with Temperature. Figure 4. On-Resistance Variation with Gate-to-Source Voltage. 1 1 VDS = 5.0V I D, DRAIN CURRENT (A) 0.8 25C 125C I S , REVERSE DRAIN CURRENT (A) TJ = -55C VGS = 0V TJ = 125C 25C -55C 0.01 0.1 0.6 0.4 0.001 0.2 0 0 0.5 1 1.5 2 2.5 VGS , GATE TO SOURCE VOLTAGE (V) 0.0001 0 0.2 0.4 0.6 0.8 1 1.2 V SD , BODY DIODE FORWARD VOLTAGE (V) Figure 5. Transfer Characteristics. Figure 6 . Body Diode Forward Voltage Variation with Source Current and Temperature. FDG6303N Rev.F Typical Electrical Characteristics (continued) 5 V GS , GATE-SOURCE VOLTAGE (V) 200 I D = 0.5A 4 CAPACITANCE (pF) VDS = 5V 10V 15V 70 Ciss 30 3 Coss 2 10 1 3 0.1 f = 1 MHz VGS = 0V 0 0.4 0.8 1.2 1.6 2 0.3 1 2 5 10 Crss 0 Q g , GATE CHARGE (nC) 25 V DS , DRAIN TO SOURCE VOLTAGE (V) Figure 7. Gate Charge Characteristics. Figure 8. Capacitance Characteristics. 3 IT 50 ID , DRAIN CURRENT (A) 1 0.5 0.2 0.1 0.05 0.02 0.01 0.1 RD S N (O )L IM 1m s 10m s POWER (W) 40 10 0m s SINGLE PULSE R JA=415C/W TA= 25C 30 1s VGS = 4.5V SINGLE PULSE RJA = 415 C/W TA = 25C 1 V DS 10 s DC 20 10 2 5 10 25 40 0 0.0001 0.001 0.01 0.1 1 10 200 , DRAI N-SOURCE VOLTAGE (V) SINGLE PULSE TIME (SEC) Figure 9. Maximum Safe Operating Area. Figure 10. Single Pulse Maximum Power Dissipation. 1 TRANSIENT THERMAL RESISTANCE r(t), NORMALIZED EFFECTIVE 0.5 0.2 0.1 0.05 0.02 0.01 0.005 D = 0.5 0.2 0.1 0.05 0.02 0.01 Single Pulse P(pk) R JA (t) = r(t) * R JA R JA =415 C/W t1 t2 TJ - TA = P * R JA (t) Duty Cycle, D = t 1/ t 2 0.002 0.0001 0.001 0.01 0.1 t 1, TIME (sec) 1 10 100 200 Figure 11. Transient Thermal Response Curve. Thermal characterization performed using the conditions described in note 1. Transient thermal response will change depending on the circuit board design. FDG6303N Rev.F TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx FACT ActiveArray FACT Quiet Series Bottomless FASTa CoolFET FASTr CROSSVOLT FRFET DOME GlobalOptoisolator EcoSPARK GTO E2CMOSTM HiSeC EnSignaTM I2C Across the board. Around the world. The Power Franchise Programmable Active Droop DISCLAIMER ImpliedDisconnect PACMAN POP ISOPLANAR Power247 LittleFET PowerTrencha MicroFET QFET MicroPak QS MICROWIRE QT Optoelectronics MSX Quiet Series MSXPro RapidConfigure OCX RapidConnect OCXPro SILENT SWITCHERa OPTOLOGICa SMART START OPTOPLANAR SPM Stealth SuperSOT-3 SuperSOT-6 SuperSOT-8 SyncFET TinyLogica TruTranslation UHC UltraFETa VCX FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILDS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component is any component of a life 1. Life support devices or systems are devices or support device or system whose failure to perform can systems which, (a) are intended for surgical implant into be reasonably expected to cause the failure of the life the body, or (b) support or sustain life, or (c) whose support device or system, or to affect its safety or failure to perform when properly used in accordance with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative or In Design First Production Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Preliminary No Identification Needed Full Production Obsolete Not In Production Rev. I2 |
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